1. Field of the Invention
The present invention relates to a signal-transferring device.
2. Description of Related Art
FIG. 27 is a block view showing a conventional example of a signal-transferring device, and FIG. 28 is a timing chart showing a first conventional example of a signal transfer operation. In the signal-transferring device of this conventional example, a transmission unit (Tx) of a primary side burst-drives a signal A at the rising edge of an input signal IN, and burst-drives a signal B at the falling edge of the input signal IN. A barrier unit (transformer) transfers the signals A and B to a secondary side while providing insulation between the primary side and the secondary side. A receiving unit (Rx) of the secondary side generates a trigger pulse in a signal C in response to the burst-driving of the signal A, and generates a trigger pulse in a signal D in response to the burst-driving of the signal B. A RS flip-flop of the secondary side sets an output signal OUT to a high level at the trigger pulse of the signal C and sets the output signal OUT to a low level at the trigger pulse signal D. As a result, when the logic level of the input signal IN is switched, the logic level of the output signal OUT is also switched in accompaniment therewith (see times t121 to t122).
Examples of prior art related to the above include Japanese Domestic Republication No. 2001-513276 and Japanese Domestic Republication No. 2003-523147 (hereinbelow referred to as Patent Documents 1 and 2).
However, in the signal-transferring devices of the prior art examples, there is a problem in that a mismatch of input/output logic continues unless the logic level of the input signal IN switches or the logic level of the output signal OUT re-inverts due to noise or the like when the logic level of the output signal OUT has unintentionally inverted due to noise or the like (see time t123 in FIG. 28).
Patent Documents 1 and 2 propose (see FIG. 29) a technique in which a refresh pulse that corresponds to the logic level of the input signal IN is periodically outputted from the input-side transmission unit (Tx), whereby the original logic level is quickly restored even when the logic level of the output signal OUT has unintentionally inverted due to noise or the like. However, this conventional technique outputs a refresh pulse unilaterally from the primary side, and does not provide a solution when an input/output logic mismatch has been detected.